triSYCL is a research project exploring the SYCL standard for heterogeneous computing, primarily targeting AMD's AI Engine (AIE) CGRA architecture and providing feedback to the Khronos Group. It offers a C++ single-source programming model for CPUs, GPUs, and FPGAs, though it is incomplete and not intended for general end-users, with more robust alternatives like DPC++ and hipSYCL available.

How It Works

This implementation leverages C++23 features, with OpenMP or TBB for CPU parallelism. It uses Boost.Compute for OpenCL interoperability and an experimental, now-obsolete LLVM/Clang version for device compilation, targeting SPIR devices. Recent efforts focus on C++ extensions for AMD AIE CGRA, with ACAP++ (C++17/20) and AIE++ (C++23/26) providing programming models for CPU emulation and AIE devices, requiring a special compiler from a related project.

Quick Start & Requirements

• Installation is primarily as a template library; examples can be built. Refer to doc/testing.rst for building examples.
• Dependencies include C++23 support, OpenMP or TBB, and Boost.Compute. Device compilation requires an experimental LLVM/Clang version and a special compiler from triSYCL/sycl.
• Setup for AIE targets involves specific toolchains and compilers.

Highlighted Details

• Experimental support for AMD FPGA and Versal ACAP AIE CGRA programming.
• Contributions to SYCL specifications (1.2, 1.2.1, 2.2, 2020) and OpenCL C++ kernel language.
• Research into C++ extensions for heterogeneous platforms.
• CI build status badge available via GitHub Actions.

Maintenance & Community

The project has seen development efforts funded by AMD and Xilinx. Technical lead is Ronan Keryell. Internship opportunities related to the project have been available.

Licensing & Compatibility

The license is the same as LLVM/Clang. Compatibility for commercial use or closed-source linking is not explicitly detailed but implied by the LLVM/Clang license.

Limitations & Caveats

This implementation is described as very incomplete and not for general end-users. The device compiler is obsolete, and AMD toolchain integration is experimental and unsupported by AMD product teams. Current AIE targets are limited to first-generation devices (AIE/AIE1).